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MFS5600AMBA0ES 데이터시트(PDF) 57 Page - NXP Semiconductors |
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MFS5600AMBA0ES 데이터시트(HTML) 57 Page - NXP Semiconductors |
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57 / 111 page ![]() NXP Semiconductors FS5600 Automotive buck regulator and controller with voltage monitors and watchdog timer 17.13.9 Low-power operation There are several ways to reduce the quiescent current consumption of the FS5600. These are: • Turning off SW1 and SW2 (via I2C, or using EN1/2 pins) • Changing SW1 and SW2 operation mode from PWM to Auto Skip or PFM mode. The operation mode of SW1 and SW2 may be changed using I2C or by using the MODE pin. 17.13.9.1 Ultra low-power operation When (MODE pin =1) AND (OTP_MODE_SYNCINB_SEL[1:0] = 00) AND (OTP_ULPM_EN = 1), the FS5600 achieves further reduction in quiescent current by turning off the internal 20 MHz clock. In this condition, I2C access is not available, the watchdog timer function is not available and external voltage monitors (VMON1-4) are disabled. PGOOD pins assigned to the external voltage monitors (VMON1-4) are asserted low. If the respective regulator is enabled, voltage monitors for SW1 and SW2 regulators remain enabled. The OTP_ULPM_EN bit is set to 1 in the QM version of FS5600. The user may choose its value in ASIL B and Enhanced ASIL B versions. 17.13.10 State transition table Transition Description Transition conditions A Power up to INIT_RUN Completion of SW1 soft-start (if EN1 = high) && Completion of SW2 soft-start (if EN2 = high) && Expiration of largest delay among OTP_GPOx_DELAY[2:0] (if GPIOx pin used as GPO AND OTP_GPOx_DELAY[2:0] NOT EQUAL to 0b000) Note: If one regulator is disabled, its soft-start completion signal is ignored as a condition for this state transition. Table 53. State transition table FS5600 All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product data sheet Rev. 3 — 2 August 2022 57 / 111 |
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