LCR1210-R100F datasheet(53/59 Pages) SKYWORKS

53 / 59 page

Si32260/1

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11.3. Thermal via Layout–QFN-47 (6x8 mm)

The thermal via layout rules in section “11.4. Thermal via Layout–QFN-60 (8x8 mm)” for the QFN-60 package

apply, except that it is not required to meet the minimum dimension d > 1.0 mm for the via edge to pin pad metal

spacing, as described in note 4.

11.4. Thermal via Layout–QFN-60 (8x8 mm)

Dimension

Min

Max

d1.00

—

5.05

—

5.05

Notes:

1. High-Tg PCB materials (Tg ≥ 170 °C) are recommended for Pb-Free reflow profiles, per

standard industry practice.

2. The customer’s PCB design must provide sufficient thermal dissipation for high power

operation of the device. See layout guidelines in application note, “AN381: Si3226x ProSLIC

Designer’s Guide”, for further details.

3. A minimum of eight thermal vias are required in each center pad. The recommended via

diameter is 0.20–0.30 mm (8–12 mils).

4. Thermal vias placed in the center pads must have a minimum spacing of 1.0 mm from the

edge of the via to the closest pin pad metal (d ≥ 1.0 mm).

5. Vias may be placed as desired within the non-hatched area of the center pads.

6. Vias placed within the center pad areas must be either filled, or tented on the top side of the

board, to prevent solder thieving from under the device.

LCR1210-R100F 데이터시트(PDF) 53 Page - Skyworks Solutions Inc.