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TDA4VE...ALZQ1 데이터시트(PDF) 121 Page - Texas Instruments

부품명 TDA4VE...ALZQ1
상세설명  TDA4VE TDA4AL TDA4VL Jacinto™ Processors, Silicon Revision 1.0
PDF  251 Pages
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TDA4VE...ALZQ1 데이터시트(HTML) 121 Page - Texas Instruments

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7.10.2.4 Isolated MCU and Main Domains Power- Up Sequencing
Isolated MCU and Main voltage domains enable an SoC’s MCU and Main processor sub-systems to operate
independently. There are 2 reasons an SoC’s PDN design may need to support independent MCU and Main
processor functionality. First is to provide flexibility to enable SoC low power modes that can significant reduce
SoC power dissipation when processor operations are not needed. Second is to enable robustness to gain
freedom from interference (FFI) of a single fault impacting both MCU and Main processor sub-systems which
is especially beneficial if using the SoC’s MCU as the system safety monitoring processor. The number of
additional PDN power rails needed is dependent upon number of different MCU IO signaling voltage levels. If
only 1.8V IO signaling is used, then only 2 additional power rails could be required. If both 1.8 and 3.3V IO
signaling is desired, then 4 additional power rails could be needed.
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TDA4VE-Q1, TDA4AL-Q1, TDA4VL-Q1
SPRSP62 – DECEMBER 2022
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Product Folder Links: TDA4VE-Q1 TDA4AL-Q1 TDA4VL-Q1



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