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AD74115BCPZ 데이터시트(PDF) 21 Page - Analog Devices |
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AD74115BCPZ 데이터시트(HTML) 21 Page - Analog Devices |
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21 / 103 page ![]() Data Sheet AD74115 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS analog.com Rev. 0 | 21 of 103 Table 19. Pin Function Description (Continued) Pin No. Mnemonic Description 26 AVSS1 Negative Analog Supply. 27 SENSE_EXT2 High Voltage Sense Pin. 28 SENSE_EXT1 High Voltage Sense Pin 29 SENSELF Filtered Low-Side Sense Pin. SENSELF can be switched to an ADC input. This pin is routed to the I/OP screw terminal side of RSENSE through the off-chip filter. 30 SENSEL Low-Side Sense Pin. SENSEL closes the loop within the voltage and current output modes. This pin is routed to the I/OP screw terminal side of RSENSE. 31 SENSEHF Filtered High-Side Sense Pin. SENSEHF can be switched to an ADC input. This pin is routed to the AD74115 side of RSENSE through the off-chip filter. 32 SENSEH High-Side Sense Pin. SENSEH closes the loop within current output mode. This pin is routed to the AD74115 side of RSENSE. 33 VIOUT Voltage or Current Force Pin. VIOUT provides a voltage or a current to the I/OP screw terminal. 34 CCOMP Compensation Capacitor Pin. CCOMP allows the AD74115 to drive high capacitive loads in the voltage output use case. Connect the capacitor between the CCOMP pin and the I/O screw terminal. 35 AGND Analog Ground. 37 LVIN Low Voltage Input Pin. The voltage on LVIN can be measured by selecting the LVIN option in the diagnostics block. The measurement voltage range is 0 V to 2.5 V. For best performance, use an antialiasing filter on this pin. 38 DO_SRC_DGATE Smart Diode Gate Drive Pin. 39 DO_SRC_GATE Sourcing Digital Output Gate Drive. 40 DO_SRC_SNS Sourcing Digital Output Sense Pin. If not using the digital output function with an external FET, tie DO_SRC_SNS to DO_VDD. 41 DO_SRC_INT Internal Sourcing Digital Output. 42 DO_VDD1 Positive Supply for Digital Output Circuit. 43 DO_SNK_SNS Sinking Digital Output Sense. 44 DO_SNK_GATE Sinking Digital Output Gate Drive. 45 DO_SNK_INT Internal Sinking Digital Output. 46 DGND Digital Ground. 47 AVCC1 5 V Analog Supply. 48 ALDO1V81 1.8 V Analog LDO Output. Do not use ALDO1V8 externally. Exposed Pad Exposed Pad. Connect the exposed pad to the AVSS pin. 1 Connect the recommended decoupling capacitors shown in Table 35. |
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