KSZ9567RTXI-TR datasheet(80/232 Pages) MICROCHIP

80 / 232 page

KSZ9567R

DS00002329D-page 80

 2017-2019 Microchip Technology Inc.

Note 5-2

The default value of this field is determined by the associated configuration strap values. Refer to

Section 3.2.1, "Configuration Straps," on page 16 for additional information.

5.1.4

GLOBAL SWITCH CONTROL REGISTERS (0x0300 - 0x03FF)

5.1.4.1

Switch Operation Register

Note 5-3

The default value of this field is determined by the LED5_1 configuration strap value. Refer to Section

3.2.1, "Configuration Straps," on page 16 for additional information.

5.1.4.2

Switch MAC Address 0 Register

5.1.4.3

Switch MAC Address 1 Register

Address:

0x0300

Size:

8 bits

Bits

Description

Type

Default

Double Tag Enable

1 = Double tagging is enabled

0 = Double tagging is disabled

R/W

6:2

RESERVED

0x00

Soft Hardware Reset

When set to 1, all register settings, except configuration strap options, are

reset to default values.

R/W

Start Switch

1 = Switch function is enabled

0 = Switch function is disabled; no traffic will be passed until this bit is set

R/W

Note 5-3

Address:

0x0302

Size:

8 bits

Bits

Description

Type

Default

7:0

MAC Address [47:40]

This register, along with the Switch MAC Address 1-5 Registers, define the

switch’s MAC address to be used as the source address in MAC pause

control frames, and for self-address filtering.

R/W

0x00

Address:

0x0303

Size:

8 bits

Bits

Description

Type

Default

7:0

MAC Address [39:32]

R/W

0x10

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