UPSD3422_V01 datasheet(90/300 Pages) STMICROELECTRONICS

90 / 300 page

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MCU bus interface

UPSD3422, UPSD3433, UPSD3434, UPSD3454

90/300

Table 51.

Number of MCU_CLK periods required to optimize bus transfer rate

MCU clock frequency,

MCU_CLK (fMCU)

CW[1:0] Clk

periods

RDW[1:0] Clk

periods

WRW[1:0] Clk

periods

3.3 V(1)

VDD of the PSD module.

5V(1)

3.3 V(1)

5V(1)

3.3 V(1)

5V(1)

40 MHz, Turbo mode PSD(2)

“Turbo mode PSD” means that the PSD module is in the faster, Turbo mode (default condition). A PSD

module in Non-Turbo mode is slower, but consumes less current. See PSD module section, titled “PLD

Non-Turbo mode” for details.

40 MHz, Non-turbo mode PSD

36 MHz, Turbo mode PSD

36 MHz, Non-turbo mode PSD

32 MHz, Turbo mode PSD

32 MHz, Non-turbo mode PSD

28 MHz, Turbo mode PSD

28 MHz, Non-turbo mode PSD

24MHz, Turbo mode PSD

24MHz, Non-turbo mode PSD

20 MHz and below, Turbo mode PSD

20 MHz and below, Non-turbo mode

PSD

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