UPSD3422_V01 datasheet(211/300 Pages) STMICROELECTRONICS

211 / 300 page

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UPSD3422, UPSD3433, UPSD3434, UPSD3454

PSD module

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The correct select signal, FSx or CSBOOTx, must be active during the entire polling

procedure.

Polling may also be used to indicate when an erase operation has completed. During an

erase operation, DQ7 is '0.' After the erase is complete DQ7 is '1.' The correct select signal,

FSx or CSBOOTx, must be active during the entire polling procedure.

DQ7 is valid after the fourth instruction byte WRITE operation (for program instruction

sequence) or after the sixth instruction byte WRITE operation (for erase instruction

sequence).

If all Flash memory sectors to be erased are protected, DQ7 is reset to ’0’ for about 100µs,

and then DQ7 returns to the value of D7 of the previously addressed byte. No erasure is

performed.

28.5.7

Toggle flag (DQ6)

The Flash memories offer an alternate way to determine when a Flash memory program

operation has completed. During the program operation and while the correct sector select

FSx or CSBOOTx is active, the Toggle Flag Bit (DQ6) toggles from '0' to '1' and '1' to ’0’ on

subsequent attempts to read any byte of the same Flash array.

When the internal program operation is complete, the toggling stops and the data read on

the data bus D0-7 is the actual value of the addressed memory byte. The device is now

accessible for a new READ or WRITE operation. The operation is finished when two

successive READs yield the same value for DQ6.

DQ6 may also be used to indicate when an erase operation has completed. During an erase

operation, DQ6 will toggle from '0' to '1' and '1' to ’0’ until the erase operation is complete,

then DQ6 stops toggling. The erase is finished when two successive READs yield the same

value of DQ6. The correct sector select signal, FSx or CSBOOTx, must be active during the

entire procedure.

DQ6 is valid after the fourth instruction byte WRITE operation (for program instruction

sequence) or after the sixth instruction byte WRITE operation (for erase instruction

sequence).

If all the Flash memory sectors selected for erasure are protected, DQ6 toggles to ’0’ for

about 100µs, then returns value of D6 of the previously addressed byte.

28.5.8

Error flag (DQ5)

During a normal program or erase operation, the Error Flag Bit (DQ5) is to ’0’. This bit is set

to ’1’ when there is a failure during Flash memory byte program, sector erase, or bulk erase

operations.

In the case of Flash memory programming, DQ5 Bit indicates an attempt to program a Flash

memory bit from the programmed state of '0,' to the erased state of 1, which is not valid.

DQ5 may also indicate a particular Flash cell is damaged and cannot be programmed.

In case of an error in a Flash memory sector erase or byte program operation, the Flash

memory sector in which the error occurred or to which the programmed byte belongs must

no longer be used. Other Flash memory sectors may still be used. DQ5 is reset after a

Reset Flash instruction sequence.

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UPSD3422 데이터시트(PDF) 211 Page - STMicroelectronics

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