1997 Nov 25

4

Philips Semiconductors

Product specification

Dual JK flip-flop with set and reset;

positive-edge trigger

74HC/HCT109

Fig.4 Functional diagram.

FUNCTION TABLE

Notes

1. H = HIGH voltage level

h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition

L = LOW voltage level

I = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition

q = lower case letters indicate the state of the referenced output one set-up time

prior to the LOW-to-HIGH CP transition

X = don’t care

↑ = LOW-to-HIGH CP transition

OPERATING

MODE

INPUTS

OUTPUTS

CP

J

KQ

Q

asynchronous set

L

H

X

X

X

H

L

asynchronous reset

H

L

X

X

X

L

H

undetermined

L

L

X

X

X

H

H

toggle

H

H

↑

hl

qq

load “0” (reset)

H

H

↑

ll

L

H

load “1” (set)

H

H

↑

hh

H

L

hold “no change”

H

H

↑

lh

q

q

PACKAGE OUTLINES

See

Fig.5 Logic diagram (one flip-flop).

handbook, full pagewidth

MBK217

C

C

C

C

C

K

J

CP

S

R

C

C

C

C

C

Q

Q