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M95256-R 데이터시트(PDF) 24 Page - STMicroelectronics

부품명 M95256-R
상세설명  256-Kbit serial SPI bus EEPROM with high-speed clock
PDF  51 Pages
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6.9
Read Lock status (available only in M95256-D devices)
The Read Lock status instruction (see Table 4. Instruction set) is used to check whether the Identification page is
locked or not in Read-only mode. The Read Lock status sequence is defined with the Chip select (S) first driven
low. The bits of the instruction byte and address bytes are then shifted in on Serial data input (D). Address bit A10
must be 1, all other address bits are Don't care. The Lock bit is the LSB (least significant bit) of the byte read on
Serial data output (Q). It is at “1” when the lock is active and at “0” when the lock is not active. If Chip select (S)
continues to be driven low, the same data byte is shifted out. The read cycle is terminated by driving Chip select
(S) high.
The following figure shows the instruction sequence.
Figure 17. Read Lock status sequence
C
D
S
Q
15
2
1
3
4
5
6
7
8
9 10
20 21 22 23 24 25 26 27
14 13
3
2
1
0
28 29 30
7
6
5
4
3
1
7
0
High impedance
Data Out 1
Instruction
16-bit address
0
MSB
MSB
2
31
Data Out 2
M95256-W M95256-R M95256-DF
Read Lock status (available only in M95256-D devices)
DS4712 - Rev 22
page 24/51



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