MCP2518FD datasheet(2/96 Pages) MICROCHIP

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MCP2518FD

DS20006027A-page 2

 2019 Microchip Technology Inc.

1.0

DEVICE OVERVIEW

The MCP2518FD device is a cost-effective and

small-footprint CAN FD controller that can be easily

added to a microcontroller with an available SPI

interface. A CAN FD channel can be easily added to a

microcontroller that is either lacking a CAN FD

peripheral or doesn’t have enough CAN FD channels.

MCP2518FD supports both CAN frames in the

Classical format (CAN2.0B) and CAN Flexible Data

Rate (CAN FD) format, as specified in ISO

11898-1:2015.

The MCP2518FD device was improved as follows:

• Added Low Power Mode (LPM), in order to

reduce leakage current to 10

A over the full

temperature range.

• Extended SEQ field in Transmit Message Object

and Transmit Event FIFO Object from 7 to 23 bits.

• Added DEVID register to distinguish between

future members of the device family.

• Switched to saw cut DFN package with wettable

flanks.

1.1

Block Diagram

Figure 1.1

shows

the

block

diagram

the

MCP2518FD device. MCP2518FD contains the

following main blocks:

• The CAN FD Controller module implements the

CAN FD protocol, and contains the FIFOs and

Filters.

• The SPI interface is used to control the device by

accessing Special Function Registers (SFR) and

RAM.

• The RAM controller arbitrates the RAM accesses

between the SPI and CAN FD Controller module.

• The Message RAM is used to store the data of the

Message Objects.

• The oscillator generates the CAN clock.

• The Internal LDO and POR circuit.

• The I/O control.

FIGURE 1-1:

MCP2518FD BLOCK DIAGRAM

Note 1: This data sheet summarizes the features

of the MCP2518FD device. It is not

intended

comprehensive

reference source. To complement the

information in this data sheet, refer to the

related section of the “MCP25xxFD

Family Reference Manual”.

I/O

Message

RAM

TXCAN

RXCAN

INT

INT0/GPIO0/XSTBY

RAM

Controller

nCS

SCK

SDI

SDO

INT1/GPIO1

CAN FD

Controller

Module

CLKO/SOF

OSC1

OSC2

Oscillator

VDD

VSS

Filter

POR

Internal

LDO

SPI

Interface

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