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DFE252012P-2R2M 데이터시트(PDF) 34 Page - Microchip Technology

부품명 DFE252012P-2R2M
상세설명  Cost and Size Optimized PMIC for SAMA5DX/SAM9X6/SAMA7G Series MPUs
PDF  44 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
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DFE252012P-2R2M 데이터시트(HTML) 34 Page - Microchip Technology

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MCP16501
DS20006388A-page 34
 2020 Microchip Technology Inc.
5.6
nSTRT Capacitor for Automatic
Turn-On on VIN Ramping
As shown in Figure 4-1, it is possible to configure the
MCP16501 for automatic start-up upon input voltage
(VIN) ramping/power cycling by connecting a capacitor
on pin nSTRT. The purpose of the capacitor (C in
Figure 4-1) is to delay the rise of the nSTRT pin when
VIN ramps up, such that after the VIN pin voltage
(connected to VIN) has stabilized, the logic level of the
nSTRT pin will still be low long enough to be interpreted
as a valid start-up event (i.e., longer than t1; see
Section 4.4.1 “Typical Power-up Sequence and
Timing”).
Under the assumption that the VIN ramping is much
shorter than the rise time of the nSTRT pin voltage, the
recommended amount of capacitance needed for
generation of a valid start-up event is given by the
formula in Equation 5-2:
EQUATION 5-2:
After the selection of capacitor C, the resulting C
RPU_nSTRT time constant must be compared to the
actual VIN ramping time to verify that indeed the nSTRT
rise time is much slower.
The time constant C RPU_nSTRT should be at least one
order of magnitude larger than the slowest VIN ramping
time expected in the application. If this is not true, the
capacitor value C must be increased further. Using a
1 µF capacitor for C, the C RPU_nSTRT time constant
will be 40 ms, which is adequate for VIN ramping times
in the ms range.
C
t1 Δt
+
RPU_nSTRT
e
VIN
VIN VIL_nSRT
–
------------------------------------


log
⋅
--------------------------------------------------------------------------------------
>
t1 Δt
+
RPU_nSTRT
e
1
10.36
–
-------------------


log
⋅
--------------------------------------------------------------------
2.24
t1 Δt
+
RPU_nSTRT
---------------------------
⋅
==
Where:
RPU_nSTRT = nSTRT Pin Pull-up Resistance (40 kΩ typical value)
VIL_nSTRT = nSTRT Logic Low Input Voltage (0.36 VIN, maximum value)
VIN = Input Voltage (VIN pin is connected to the voltage VIN)
t1 = Delay from nSTRT Falling to First Output VOUT1 Starting (≈ 0.5 ms); see Section 4.4.1
“Typical Power-up Sequence and Timing”
Δt = Additional Delay from VIN Voltage established to the Detection of a Logic Low Level on
nSTRT (due to internal logic wake-up time): ≈ 100 µs



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