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HC705JB2GRS/H 데이터시트(PDF) 16 Page - NXP Semiconductors

부품명 HC705JB2GRS/H
상세설명  Industry standard M68HC05 CPU core
PDF  128 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
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GENERAL RELEASE SPECIFICATION
August 28, 1998
GENERAL DESCRIPTION
MC68HC705JB2
1-4
REV 1.1
Figure 1-2. Pin Assignments for 20-Pin Package
1.4
FUNCTIONAL PIN DESCRIPTIONS
The following paragraphs give a description of the general function of each pin
assigned in Figure 1-2.
1.4.1 VDD, VSS
Power is supplied to the MCU through VDD and VSS. VDD is the positive supply,
and VSS is ground. The MCU operates from a single power supply.
Very fast signal transitions occur on the MCU pins. The short rise and fall times
place very high short-duration current demands on the power supply. To prevent
noise problems, special care should be taken to provide good power supply
bypassing at the MCU by using bypass capacitors with good high-frequency
characteristics that are positioned as close to the MCU as possible. Bypassing
requirements vary, depending on how heavily the MCU pins are loaded.
1.4.2 OSC1, OSC2
The OSC1 and OSC2 pins are the connections for the on-chip oscillator. The
OSC1 and OSC2 pins can accept the following sets of components:
RESET
1
PA0
2
PA1
3
PA2
4
PA3
5
PA4
6
PB0/TCAP
7
PB1
8
VDD
20
OSC1
19
OSC2
18
VSS
17
3.3V
16
D+
15
D–
14
PA7
13
PA6
12
PA5
11
IRQ/VPP
10
PB2
9
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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