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HC705JJ7GRS/D 데이터시트(PDF) 92 Page - NXP Semiconductors

부품명 HC705JJ7GRS/D
상세설명  Low-Cost, HC05 Core MCU in 20-Pin Package (MC68HC705JJ7) or 28-Pin Package (MC68HC705JP7)
PDF  230 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
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HC705JJ7GRS/D 데이터시트(HTML) 92 Page - NXP Semiconductors

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Parallel Input/Output
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
Parallel Input/Output
7.4.7 PB5/SDO Logic
The PB5/SDO pin can be used as a simple I/O port pin or be controlled
by the SIOP serial interface as shown in Figure 7-10. The operations of
the PB5 pin are summarized in Table 7-3.
Figure 7-10. PB5/SDO Pin I/O Circuit
DATA DIRECTION
REGISTER B
BIT DDRB5
PORT B DATA
REGISTER
BIT PB5
PULLDOWN
REGISTER B
BIT PDIB5
R
R
PB5
READ $0005
WRITE $0001
READ $0001
WRITE $0011
PULLDOWN
DEVICE
RESET
WRITE $0005
SDO
SERIAL ENABLE (SPE)
SERIAL DATA OUT (SDO)
VDD
MASK OPTION REGISTER ($1FF1)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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