LTC2292UP datasheet(5/28 Pages) LINER

5 / 28 page

LTC2293/LTC2292/LTC2291

229321f

POWER REQUIRE E TS The ● denotes the specifications which apply over the full operating temperature

range, otherwise specifications are at TA = 25°C. (Note 8)

TI I G CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature

range, otherwise specifications are at TA = 25°C. (Note 4)

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 2: All voltage values are with respect to ground with GND and OGND

wired together (unless otherwise noted).

Note 3: When these pin voltages are taken below GND or above VDD, they

will be clamped by internal diodes. This product can handle input currents

of greater than 100mA below GND or above VDD without latchup.

Note 4: VDD = 3V, fSAMPLE = 65MHz (LTC2293), 40MHz (LTC2292), or

25MHz (LTC2291), input range = 2VP-P with differential drive, unless

otherwise noted.

Note 5: Integral nonlinearity is defined as the deviation of a code from a

straight line passing through the actual endpoints of the transfer curve.

The deviation is measured from the center of the quantization band.

Note 6: Offset error is the offset voltage measured from –0.5 LSB when

the output code flickers between 0000 0000 0000 and 1111 1111 1111.

Note 7: Guaranteed by design, not subject to test.

Note 8: VDD = 3V, fSAMPLE = 65MHz (LTC2293), 40MHz (LTC2292), or

25MHz (LTC2291), input range = 1VP-P with differential drive. The supply

current and power dissipation are the sum total for both channels with

both channels active.

Note 9: Recommended operating conditions.

LTC2293

LTC2292

LTC2291

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

VDD

Analog Supply

(Note 9)

●

2.7

3.4

2.7

3.4

2.7

3.4

Voltage

OVDD

Output Supply

(Note 9)

●

0.5

3.6

0.5

3.6

0.5

3.6

Voltage

IVDD

Supply Current

Both ADCs at fS(MAX)

●

133

150

PDISS

Power Dissipation

Both ADCs at fS(MAX)

●

400

450

235

285

150

180

PSHDN

Shutdown Power

SHDN = H,

(Each Channel)

OE = H, No CLK

PNAP

Nap Mode Power

SHDN = H,

(Each Channel)

OE = L, No CLK

LTC2293

LTC2292

LTC2291

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

Sampling Frequency (Note 9)

●

165

125

MHz

CLK Low Time

Duty Cycle Stabilizer Off

●

7.3

7.7

500

11.8

12.5

500

18.9

500

Duty Cycle Stabilizer On

●

7.7

500

12.5

500

(Note 7)

CLK High Time

Duty Cycle Stabilizer Off

●

7.3

7.7

500

11.8

12.5

500

18.9

500

Duty Cycle Stabilizer On

●

7.7

500

12.5

500

(Note 7)

tAP

Sample-and-Hold

Aperture Delay

CLK to DATA Delay

CL = 5pF (Note 7)

●

1.4

2.7

5.4

1.4

2.7

5.4

1.4

2.7

5.4

tMD

MUX to DATA Delay CL = 5pF (Note 7)

●

1.4

2.7

5.4

1.4

2.7

5.4

1.4

2.7

5.4

Data Access Time

CL = 5pF (Note 7)

●

4.3

After OE↓

BUS Relinquish Time (Note 7)

●

3.3

8.5

3.3

8.5

3.3

8.5

Pipeline

Cycles

Latency

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