 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
C5EC3EARCH-RM/D 데이터시트(PDF) 47 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
C5EC3EARCH-RM/D 데이터시트(HTML) 47 Page - NXP Semiconductors |
|
|
47 / 114 page  Pin Descriptions Grouped by Function 47 03 General System Interface Signal Table 18 provides the signal for the Executive Processor reset power status and I/O clock. The C-5e NP can be powered up with the XP either running or with the XP in reset mode similar to the CPs. When the XP remains in reset mode, an external host can be used to control the initialization of the C-5e NP. Table 18 General System Interface Signal SIGNAL NAME PIN # TOTAL TYPE I/O SIGNAL DESCRIPTION XPUHOT W8 1 LVTTL I PD Sample at Power On Reset determines if the XP RISC Core is held in reset. Low equals reset and High equals active. During normal operation, this is an external interrupt. TOTAL PINS 1 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
