| 전자부품 데이터시트 검색엔진 |
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VIPERGAN50TR 데이터시트(PDF) 17 Page - STMicroelectronics |
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VIPERGAN50TR 데이터시트(HTML) 17 Page - STMicroelectronics |
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17 / 37 page ![]() Figure 15. Feed-forward compensation: simplified internal schematic and pin configuration. During GaN’s on-time the current sourced from the ZCD pin through the ROPP resistor is mirrored inside the “Feed-forward Logic” block to provide a feed-forward current IFF, proportional to the input voltage according to the formula: Equation 1 (1) IFF=NAUXNPRI∙ VINROPP The optimum value of the compensation, which minimizes the power capability variation over the input voltage range, is the one that provides equal power capability at the extremes of the range, and is defined by the proper selection of the resistor, according to the equation below: Equation 2 (2) ROPP=NAUXNPRI∙ αFFG1∙VFBH∙ VMIN+VMAX+VMIN∙VMAX VR With a proper compensation, it is possible to optimize the power capability change, as shown in the diagram of Figure 16. Feed-forward compensation affects the power level to enter burst-mode, thus the current IFF is linearly reduced, starting from 100 % (at VFB ≥ 1.2 V) to 20 % (at VFB < 0.8 V). The residual IFF in burst-mode ensures a certain level of compensation against the propagation delay TD. VIPERGAN50 Line voltage feed-forward block DS13888 - Rev 2 page 17/37 |
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