STM32G0C1NET3 datasheet(112/159 Pages) STMICROELECTRONICS

112 / 159 page

Electrical characteristics

STM32G0C1xC/xE

112/159

DS13564 Rev 4

5.3.19

Voltage reference buffer characteristics

SINAD

Signal-to-noise

and distortion

ratio

DAC output buffer ON

CL ≤ 50 pF, RL ≥ 5 kΩ, 1 kHz

-70.4

DAC output buffer OFF

CL ≤ 50 pF, no RL, 1 kHz

-71-

ENOB

Effective

number of bits

DAC output buffer ON

CL ≤ 50 pF, RL ≥ 5 kΩ, 1 kHz

-11.4-

bits

DAC output buffer OFF

CL ≤ 50 pF, no RL, 1 kHz

-11.5-

1. Guaranteed by design.

2. Difference between two consecutive codes - 1 LSB.

3. Difference between measured value at Code i and the value at Code i on a line drawn between Code 0 and last Code 4095.

4. Difference between the value measured at Code (0x001) and the ideal value.

5. Difference between ideal slope of the transfer function and measured slope computed from code 0x000 and 0xFFF when

buffer is OFF, and from code giving 0.2 V and (VREF+ – 0.2) V when buffer is ON.

Table 65. DAC accuracy(1) (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

Table 66. VREFBUF characteristics(1)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VDDA

Analog supply

voltage

Normal mode

VRS = 0

2.4

3.6

VRS = 1

2.8

3.6

Degraded mode(2)

VRS = 0

1.65

2.4

VRS = 1

1.65

2.8

VREFBUF_

OUT

Voltage

reference output

Iload = 100 µA

T = 30 °C

VRS = 0

2.038

2.042

2.046

VRS = 1

2.497

2.5

2.503

VRS = 0

VDDA-150 mV

VDDA

VRS = 1

VDDA-150 mV

VDDA

TRIM

Trim step

resolution

±0.05

±0.1

Load capacitor

0.5

1.5

µF

esr

Equivalent

Serial Resistor

of Cload

Ω

Iload

Static load

current

Iline_reg

Line regulation

2.8 V ≤ VDDA ≤ 3.6 V

Iload = 500 µA

200

1000

ppm/V

Iload = 4 mA

100

500

Iload_reg

Load regulation

500 μA ≤ Iload ≤4 mA Normal mode

500

ppm/mA

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