AD7142 datasheet(6/68 Pages) AD

부품명	AD7142

상세설명	Programmable Capacitance-to-Digital Converter with Environmental Compensation

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AD7142

Rev. 0 | Page 6 of 68

I2C TIMING SPECIFICATIONS (AD7142-1)

TA = −40°C to +85°C; VDRIVE = 1.65 V to 3.6 V; AVCC, DVCC = 2.6 V to 3.6 V, unless otherwise noted. Sample tested at 25°C to ensure

compliance. All input signals timed from a voltage level of 1.6 V.

Table 5. I2C Timing Specifications1

Parameter

Limit

Unit

Description

fSCLK

400

kHz max

0.6

μs min

Start condition hold time, tHD; STA

1.3

μs min

Clock low period, tLOW

0.6

μs min

Clock high period, tHIGH

100

ns min

Data setup time, tSU; DAT

300

ns min

Data hold time, tHD; DAT

0.6

μs min

Stop condition setup time, tSU; STO

0.6

μs min

Start condition setup time, tSU; STA

1.3

μs min

Bus free time between stop and start conditions, tBUF

300

ns max

Clock/data rise time

300

ns max

Clock/data fall time

1 Guaranteed by design, not production tested.

200µA

IOL

200µA

IOH

1.6V

TO OUTPUT

50pF

Figure 3. Load Circuit for Digital Output Timing Specifications

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