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APR9/D 데이터시트(PDF) 16 Page - NXP Semiconductors |
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APR9/D 데이터시트(HTML) 16 Page - NXP Semiconductors |
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16 / 101 page ![]() 1-10 DSP56001A/D, Rev. 1 MOTOROLA DSP56001A Serial Communications Interface Port SERIAL COMMUNICATIONS INTERFACE PORT Table 1-10 Serial Communications Interface (SCI) Signals Signal Name Signal Type State during Reset Signal Description RXD PC0 Input Input or Output Tri-stated Receive Data (RXD)—This input receives byte-oriented data and transfers the data to the SCI receive shift register. Input data can be sampled on either the positive edge or on the negative edge of the receive clock, depending on how the SCI control register is programmed. Port C GPIO 0 (PC0) —This signal is a GPIO signal called PC0 when the SCI RXD function is not being used. After reset, the default state is GPIO input. TXD PC1 Output Input or Output Tri-stated Transmit Data (TXD)—This output transmits serial data from the SCI transmit shift register. In the default configuration, the data changes on the positive clock edge and is valid on the negative clock edge. The user can reverse this clock polarity by programming the SCI control register appropriately. Port C GPIO 1 (PC1) —This signal is a GPIO signal called PC1 when the SCI TXD function is not being used. After reset, the default state is GPIO input. SCLK PC2 Input/ Output Input or Output Tri-stated SCI Clock (SCLK)—This signal provides an input or output clock from which the transmit/receive baud rate is derived in the Asynchronous mode, and from which data is transferred in the Synchronous mode. The direction and function of the signal is defined by the RCM bit in the SCI Clock Control Register (SCCR). Port C GPIO 2 (PC2) —This signal is a GPIO signal called PC2 when the SCI TCLK function is not being used. After reset, the default state is GPIO input. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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