NV021 Data Sheet

©2016 Integrated Device Technology, Inc

Revision B January 26, 2016

7

TERMINATION FOR 3.3V LVPECL OUTPUT

The clock layout topology shown below is a typical termination

for LVPECL outputs. The two different layouts mentioned are

recommended only as guidelines.

FOUT and nFOUT are low impedance follower outputs that

generate ECL/LVPECL compatible outputs. Therefore, termi-

nating resistors (DC current path to ground) or current sources

must be used for functionality. These outputs are designed to

FIGURE 3B. LVPECL OUTPUT TERMINATION

FIGURE 3A. LVPECL OUTPUT TERMINATION

drive 50

Ω transmission lines. Matched impedance techniques

should be used to maximize operating frequency and minimize

signal distortion. Figures 3A and 3B show two different layouts

which are recommended only as guidelines. Other suitable clock

layouts may exist and it would be recommended that the board

designers simulate to guarantee compatibility across all printed

circuit and clock component process variations.

INPUTS:

CRYSTAL INPUT:

For applications not requiring the use of the crystal oscillator

input, both XTAL_IN and XTAL_OUT can be left floating.Though

not required, but for additional protection, a 1k

Ω resistor can be

tied from XTAL_IN to ground.

RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS

OUTPUTS:

LVPECL OUTPUT

All unused LVPECL outputs can be left floating.We recommend

that there is no trace attached. Both sides of the differential

output pair should either be left floating or terminated.