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DP83255AVF 데이터시트(PDF) 17 Page - National Semiconductor (TI) |
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DP83255AVF 데이터시트(HTML) 17 Page - National Semiconductor (TI) |
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17 / 96 page ![]() 40 Modes of Operation (Continued) 433 External Loopback The External Loopback mode can be used to test the func- tionality of the PLAYER device and to test the data paths between the PLAYER CRD and BMAC devices before transmitting and receiving data through the network When in the External Loopback mode the PLAYER device performs the following functions Directs the output data of the Transmitter Block to the external Loopback Data pins (LBDg) which are normal- ly connected to the Clock Recovery Device (see Figure 2 PLAYER Device Block Diagram) Outputs Quiet symbols through the PMD Data Request pins (TXDg) The level of the Quiet symbols transmitted through the TXCg pins is programmable through the Transmit Quiet Level bit of the Mode Register If both Internal Loopback and External Loopback modes are selected Internal Loopback mode will have priority over Ex- ternal Loopback mode See Figure 4-3 for a block diagram TLF10386 – 17 FIGURE 4-3 External Loopback 17 |
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