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ICS1524AMLF 데이터시트(PDF) 12 Page - Renesas Technology Corp

부품명 ICS1524AMLF
상세설명  Dual Output Phase Controlled SSTL_3/PECL Clock Generator
PDF  25 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ICS1524AMLF 데이터시트(HTML) 12 Page - Renesas Technology Corp

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ICS1524A
12
Name:
Chip Version Register
Register:
10 h
Index:
Read
Bit Name
Bit #
Reset Value
Description
Chip Ver
0-7
17
Chip Version 24 (18h )
Name:
Chip Revision Register
Register:
11h
Index:
Read
Bit Name
Bit #
Reset Value
Description
Chip Rev
0 -7
01+
Initial value 01h.
+Value increments with each all-layer change.
Name:
Status Register
Register:
12 h
Index:
Read
Bit Name
Bit #
Reset Value
Description
DPA_Lock
0
N/A
DPA Lock Status
PLL_Lock
1
N/A
PLL Lock Status
Reserved
2 -7
0
Reserved
Bit
Name
Description
0
DPA_Lock
DPA Lock Status. (Refer to Register 0h, bits 6 and 7.)
0 = Unlocked
1 = Locked
1
PLL_Lock
PLL Lock Status. (Refer to Register 0h, bits 6 and 7.)
0 = Unlocked
1 = Locked
2 -7
Reserved



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