STR750F datasheet(6/73 Pages) STMICROELECTRONICS

6 / 73 page

Introduction

STR750F

6/71

In SLOW mode, the AHB clock can be significantly decreased to reduce power

consumption.

The built-in Clock Controller also provides the 48 MHz USB clock directly without any extra

oscillators or PLL. For instance, starting from the 4 MHz crystal source, it is possible to

obtain in parallel 60 MHz for the AHB clock, 48 MHz for the USB clock and 30 MHz for the

APB peripherals.

Boot modes

At start-up, boot pins are used to select one of five boot options:

●

Boot from internal flash

●

Boot from external serial Flash memory

●

Boot from internal boot loader

●

Boot from internal SRAM

Booting from SMI memory allows booting from a serial flash. This way, a specific boot

monitor can be implemented. Alternatively, the STR750F can boot from the internal boot

loader that implements a boot from UART.

Power Supply Schemes

You can connect the device in any of the following ways depending on your application.

●

Power Scheme 1: Single external 3.3V power source. In this configuration the

VCORE supply required for the internal logic is generated internally by the main voltage

regulator and the VBACKUP supply is generated internally by the low power voltage

regulator. This scheme has the advantage of requiring only one 3.3V power source.

●

Power Scheme 2: Dual external 3.3V and 1.8V power sources. In this configuration,

the internal voltage regulators are switched off by forcing the VREG_DIS pin to high

level. VCORE is provided externally through the V18 and V18REG power pins and

VBACKUP through the V18_BKP pin. This scheme is intended to save power consumption

for applications which already provide an 1.8V power supply.

●

Power Scheme 3: Single external 5.0V power source. In this configuration the

VCORE supply required for the internal logic is generated internally by the main voltage

regulator and the VBACKUP supply is generated internally by the low power voltage

regulator. This scheme has the advantage of requiring only one 5.0V power source.

●

Power Scheme 4: Dual external 5.0V and 1.8V power sources. In this configuration,

the internal voltage regulators are switched off, by forcing the VREG_DIS pin to high

level. VCORE is provided externally through the V18 and V18REG power pins and

VBACKUP through the V18_BKP pin. This scheme is intended to provide 5V I/O capability.

Caution: When powered by 5.0V, the USB peripheral cannot operate.

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