PCF5271CVM100 datasheet(38/56 Pages) FREESCALE

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MCF5271 Integrated Microprocessor Hardware Specification, Rev. 1.2

Preliminary Electrical Characteristics

Freescale Semiconductor

Timings listed in Table 30 are shown in Figure 6 & Figure A-3.

Figure 6. General Input Timing Requirements

8.6

Processor Bus Output Timing Specifications

Table 31 lists processor bus output timings.

Table 31. External Bus Output Timing Specifications

Name

Characteristic

Symbol

Min

Max

Unit

Control Outputs

B6a

CLKOUT high to chip selects valid 1

tCHCV

—0.5tCYC +5

B6b

CLKOUT high to byte enables (BS[3:0]) valid2

tCHBV

—0.5tCYC +5

B6c

CLKOUT high to output enable (OE) valid3

tCHOV

—0.5tCYC +5

CLKOUT high to control output (BS[3:0], OE) invalid

tCHCOI

0.5tCYC+1.5

—

B7a

CLKOUT high to chip selects invalid

tCHCI

0.5tCYC+1.5

—

Invalid

CLKOUT(75MHz)

TSETUP

THOLD

Input Setup And Hold

1.5V

trise

Vh = VIH

Vl = VIL

1.5V

1.5V Valid

tfall

Vh = VIH

Vl = VIL

Input Rise Time

Input Fall Time

* The timings are also valid for inputs sampled on the negative clock edge.

Inputs

CLKOUT

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