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LP5912 데이터시트(PDF) 31 Page - Texas Instruments |
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LP5912 데이터시트(HTML) 31 Page - Texas Instruments |
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31 / 33 page ![]() www.ti.com EXAMPLE BOARD LAYOUT 0.07 MIN ALL AROUND 0.07 MAX ALL AROUND (1) 4X (0.65) (1.95) 6X (0.3) 6X (0.45) (1.6) (R0.05) TYP ( 0.2) VIA TYP (1.1) WSON - 0.8 mm max height DRV0006A PLASTIC SMALL OUTLINE - NO LEAD 4222173/B 04/2018 SYMM 1 3 4 6 SYMM LAND PATTERN EXAMPLE SCALE:25X 7 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If some or all are implemented, recommended via locations are shown. SOLDER MASK OPENING SOLDER MASK METAL UNDER SOLDER MASK DEFINED METAL SOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED) |
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