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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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CLC031VEC 데이터시트(PDF) 7 Page - National Semiconductor (TI) |
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CLC031VEC 데이터시트(HTML) 7 Page - National Semiconductor (TI) |
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7 / 31 page  AC Electrical Characteristics Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Note 3). Symbol Parameter Conditions Reference Min Typ Max Units Serial Video Data Inputs BR SDI Serial Input Data Rate SMPTE 259M, Level C SDI, SDI 270 M BPS SMPTE 259M, Level D 360 SMPTE 344M 540 SMPTE 292M 1,483 SMPTE 292M 1,485 t r,tf Rise Time, Fall Time 20%–80%, SMPTE 259M Data Rates 720 800 880 ps 20%–80%, SMPTE 292M Data Rates 270 Parallel Video Data Outputs f VCLK Video Output Clock Frequency SMPTE 259M, 270M BPS V CLK 27.0 MHz SMPTE 267M, 360M BPS 36.0 SMPTE 344M, 540M BPS 54.0 SMPTE 292M, 1,483M BPS 74.176 SMPTE 292M, 1,485M BPS 74.25 t pd Propagation Delay, Video Clock to Video Data Valid 50%–50% V CLK to DVN Timing Diagram 0.5 2.0 ns t JIT Video Data Output Clock Jitter 27MHz V CLK 3.0 ns P-P 36MHz 2.2 54MHz 1.5 74.25MHz 1.0 Parallel Ancilliary / Control Data Inputs, Multi-function Parallel Bus Inputs f ACLK Ancilliary / Control Data Clock Frequency A CLK 74.25 MHz DC A Ancilliary / Control Clock Duty Cycle ANC Data clock (Note 7) 45 50 55 % t r,tf Output Rise Time, Fall Time 10%–90% IO N,ADN,ACLK Timing Diagram 1.0 1.5 3.0 ns t S Setup Time, AD N to ACLK or IO N to ACLK Rising Edge Control Data Input or I/O Bus Input 3.0 1.5 t H Hold Time, Rising Edge A CLK to ADN or ACLK to IO N 3.0 1.5 Parallel Ancilliary / Control Data Outputs t pd Propagation Delay, Clock to Control Data 50%–50% A CLK to ADN Timing Diagram 8.5 ns t pd Propagation Delay, Clock to Ancilliary Data 11.5 Multi-function Parallel I/O Bus t r,tf Rise Time, Fall Time 10%–90% IO0–IO7 Timing Diagram 1.0 1.5 3.0 ns PLL/CDR, Format Detect t LOCK Lock Detect Time SD Rates (Note 5) 0.32 1.0 ms HD Rates (Note 5) 0.26 1.0 t FORMAT Format Detect Time All Rates 20 Note 1: “Absolute Maximum Ratings” are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of “Electrical Characteristics” specifies acceptable device operating conditions. Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are referenced to VSSIO =VSSD = VSSSI =0V. www.national.com 7 |
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