TMD3702VC datasheet(25/57 Pages) AMSCO

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[v2-00] 2023-Mar-14

TMD3702VC − Register Description

PIHTL Register (Address 0x8A)

Figure 31:

PIHTL Register

PIHTH Register (Address 0x8B)

Figure 32:

PIHTH Register

The contents of the PIHTH and PIHTL registers are combined

and treated as a fourteen (14) bit threshold high value. If the

value generated by the proximity ADC (PDATA) is above the

PIHTL/H threshold and the PPERS value is reached, the PINT bit

is asserted. If PIEN is set, then the INT pin will also assert. When

setting the 14-bit proximity threshold, PIHTL must be written

first, immediately follow by PIHTH. Internally, the lower 8-bits

are buffered until the upper 8-bits are written. As the upper

8-bits are written both the high and low bytes are

simultaneously latched as a 14-bit value.

If Automatic Pulse Control (APC) is disabled by setting bit 6 in

CFG6 to 1, then the proximity data converts to a 10-bit value.

PIHTL contains a 8-bit threshold which is compared against the

upper 8-bits of the 10-bit value. PIHTH is ignored.

Addr: 0x8A

PIHTL

Bit

Bit Name

Default

Access

Bit Description

7:0

PIHTL

0x00

This register contains the low byte of the 14-bit

proximity HIGH threshold when APC is enabled. If APC

is disabled, this register contains the HIGH threshold

which is an 8-bit value which is compared against the

upper 8-bits of the 10-bit proximity value.

Addr: 0x8B

PIHTH

Bit

Bit Name

Default

Access

Bit Description

7:6

Reserved

Reserved. Must be set to default value.

5:0

PIHTH

0x00

This register contains the upper 6 bits of the 14-bit

proximity HIGH threshold when APC is enabled. If APC

is disabled, this register is ignored.

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