CDB5345

2

DS658DB1

TABLE OF CONTENTS

1. SYSTEM OVERVIEW ............................................................................................................... 4

1.1 Power ................................................................................................................................. 4

1.2 Grounding and Power Supply Decoupling ......................................................................... 4

1.3 CS5345 Audio ADC ...........................................................................................................4

1.4 CS8406 Digital Audio Transmitter ...................................................................................... 4

1.5 FPGA ................................................................................................................................. 4

1.6 Canned Oscillator .............................................................................................................. 4

1.7 External Control Headers ...................................................................................................5

1.8 Analog Inputs ..................................................................................................................... 5

1.9 Analog Outputs .................................................................................................................. 5

1.10 Serial Control Port ............................................................................................................ 5

1.11 USB Control Port ............................................................................................................. 5

2. SYSTEM CLOCKS AND DATA ................................................................................................ 6

2.1 Clock Routing ..................................................................................................................... 6

2.2 Data Routing ...................................................................................................................... 6

3. PC SOFTWARE CONTROL ..................................................................................................... 7

3.1 CDB5345 Controls Tab ...................................................................................................... 7

3.2 Register Maps Tab ............................................................................................................. 8

3.3 Pre-Configured Script Files ................................................................................................8

3.3.1 Oscillator Clock - ADC Ch 1 In to In to SPDIF & PGA Out ................................... 8

3.3.2 Oscillator Clock - ADC Ch 2 In to In to SPDIF Out ............................................... 9

4. FPGA REGISTER QUICK REFERENCE ............................................................................... 10

5. FPGA REGISTER DESCRIPTION ......................................................................................... 11

6. CDB CONNECTORS, JUMPERS, AND SWITCHES ............................................................. 13

7. CDB BLOCK DIAGRAM

..................................................................................................... 15

8. CDB SCHEMATICS ............................................................................................................... 16

9. CDB LAYOUT ........................................................................................................................ 24

10. REVISION HISTORY ............................................................................................................ 27