WM8987LGECOSLASHV datasheet(35/58 Pages) WOLFSON

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Pre-Production

WM8987L

PP Rev 3.0 January 2007

DIGITAL AUDIO INTERFACE

The digital audio interface is used for inputting DAC data into the WM8987L and outputting ADC data

from it. It uses five pins:

•

ADCDAT: ADC data output

•

ADCLRC: ADC data alignment clock

•

DACDAT: DAC data input

•

DACLRC: DAC data alignment clock

•

BCLK: Bit clock, for synchronisation

The clock signals BCLK, ADCLRC and DACLRC can be outputs when the WM8987L operates as a

master, or inputs when it is a slave (see Master and Slave Mode Operation, below).

Three different audio data formats are supported:

•

DSP mode

•

Left justified

All of these modes are MSB first. They are described in Audio Data Formats, below. Refer to the

Electrical Characteristic section for timing information.

MASTER AND SLAVE MODE OPERATION

The WM8987L can be configured as either a master or slave mode device. As a master device the

WM8987L generates BCLK, ADCLRC and DACLRC and thus controls sequencing of the data

transfer on ADCDAT and DACDAT. In slave mode, the WM8987L responds with data to clocks it

receives over the digital audio interface. The mode can be selected by writing to the MS bit (see

Table 23). Master and slave modes are illustrated below.

Figure 11 Master Mode

Figure 12 Slave Mode

WM8987LGECO/V 데이터시트(PDF) 35 Page - Wolfson Microelectronics plc