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WM8987LGECO/V 데이터시트(PDF) 36 Page - Wolfson Microelectronics plc |
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WM8987LGECO/V 데이터시트(HTML) 36 Page - Wolfson Microelectronics plc |
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36 / 58 page ![]() WM8987L Pre-Production w PP Rev 3.0 January 2007 36 AUDIO DATA FORMATS In Left Justified mode, the MSB is available on the first rising edge of BCLK following a LRCLK transition. The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles before each LRCLK transition. Figure 13 Left Justified Audio Interface (assuming n-bit word length) In I 2S mode, the MSB is available on the second rising edge of BCLK following a LRCLK transition. The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles between the LSB of one sample and the MSB of the next. Figure 14 I 2S Justified Audio Interface (assuming n-bit word length) In DSP/PCM mode, the left channel MSB is available on either the 1 st (mode B) or 2nd (mode A) rising edge of BCLK (selectable by LRP) following a rising edge of LRC. Right channel data immediately follows left channel data. Depending on word length, BCLK frequency and sample rate, there may be unused BCLK cycles between the LSB of the right channel data and the next sample. In device master mode, the LRC output will resemble the frame pulse shown in Figure 15 and Figure 16. In device slave mode, Figure 17 and Figure 18, it is possible to use any length of frame pulse less than 1/fs, providing the falling edge of the frame pulse occurs greater than one BCLK period before the rising edge of the next frame pulse. |
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