L6714 datasheet(38/70 Pages) STMICROELECTRONICS

38 / 70 page

Voltage positioning

L6714

38/70

12.2

Offset (Optional)

The OFFSET pin allows programming a positive offset (VOS) for the output voltage by

connecting a resistor ROFFSET vs. SGND; this offset has to be considered in addition to the

one already introduced during the production stage for the Intel VR10,VR11 Mode.

The OFFSET pin is internally fixed at 1.240V (See Table 4) a current is programmed by

connecting the resistor ROFFSET between the pin and SGND: this current is mirrored and

then properly sunk from the FB pin as shown in Figure 12. Output voltage is then

programmed as follow:

Offset resistor can be designed by considering the following relationship (RFB is fixed by the

Droop effect):

Offset automatically given by the DAC selection differs from the offset implemented through

the OFFSET pin: the built-in feature is trimmed in production and assures ±0.5% error

(±0.6% for the AMD DAC) over load and line variations.

Figure 12. Voltage positioning with offset

OUT

REF

DROOP

OFFSET

–

()

⋅

–

OFFSET

1.240V

-------------------

⋅

1.240V

ROFFSET

OFFSET

VREF

COMP

VSEN

64k

FBR

FBG

64k

RFB

To Vcore

(Remote Sense)

DROOP

L6714 데이터시트(PDF) 38 Page - STMicroelectronics

L6714 데이터시트(HTML) 38 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70

데이터시트 다운로드

링크 URL