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COM20020D 데이터시트(PDF) 8 Page - SMSC Corporation |
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COM20020D 데이터시트(HTML) 8 Page - SMSC Corporation |
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8 / 72 page ![]() 8 PROTOCOL DESCRIPTION NETWORK PROTOCOL Communication on the network is based on a token passing protocol. Establishment of the network configuration and management of the network protocol are handled entirely by the COM20020D's internal microcoded sequencer. A processor or intelligent peripheral transmits data by simply loading a data packet and its destination ID into the COM20020D's internal RAM buffer, and issuing a command to enable the transmitter. When the COM20020D next receives the token, it verifies that the receiving node is ready by first transmitting a FREE BUFFER ENQUIRY message. If the receiving node transmits an ACKnowledge message, the data packet is transmitted followed by a 16-bit CRC. If the receiving node cannot accept the packet (typically its receiver is inhibited), it transmits a Negative AcKnowledge message and the transmitter passes the token. Once it has been established that the receiving node can accept the packet and transmission is complete, the receiving node verifies the packet. If the packet is received successfully, the receiving node transmits an ACKnowledge message (or nothing if it is not received successfully) allowing the transmitter to set the appropriate status bits to indicate successful or unsuccessful delivery of the packet. An interrupt mask permits the COM20020D to generate an interrupt to the processor when selected status bits become true. Figure 1 is a flow chart illustrating the internal operation of the COM20020D connected to a 20 MHz crystal oscillator. DATA RATES The COM20020D is capable of supporting data rates from 156.25 Kbps to 5 Mbps. The following protocol description assumes a 5 Mbps data rate. To attain the faster data rates, the clock frequency may be doubled by the internal clock multiplier (see next section). For slower data rates, an internal clock divider scales down the clock frequency. Thus all timeout values are scaled as shown in the following table: Example: IDLE LINE Timeout @ 5 Mbps = 41 µs. IDLE LINE Timeout for 156.2 Kbps is 41 µs * 32 = 1.3 ms INTERNAL CLOCK FREQUENCY CLOCK PRESCALER DATA RATE TIMEOUT SCALING FACTOR (MULTIPLY BY) 40 MHz Div. by 8 5 Mbps 1 20 MHz Div. by 8 Div. by 16 Div. by 32 Div. by 64 Div. by 128 2.5 Mbps 1.25 Mbps 625 Kbps 312.5 Kbps 156.25 Kbps 2 4 8 16 32 |
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