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UPD66P04BGS 데이터시트(PDF) 13 Page - Renesas Technology Corp |
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UPD66P04BGS 데이터시트(HTML) 13 Page - Renesas Technology Corp |
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13 / 34 page ![]() 11 µPD66P04B Data Sheet U13596EJ2V1DS00 3.2 Program Memory Writing Procedure The program memory is written at high speed in the following procedure. (1) Pull down the pins not used to GND via resistor. Keep the CLK pin low. (2) Supply 5 V to the VDD pin. Keep the VPP pin low. (3) Supply 5 V to the VPP pin after waiting for 10 µs. (4) Wait for 2 ms until oscillation of the clock connected across the OSCIN and OSCOUT pins stabilizes. (5) Set the program memory address 0 clear mode by using the mode setting pins. (6) Supply 6 V to VDD and 12.5 V to VPP. (7) Set the program inhibit mode. (8) Write data to the program memory in the 1-ms write mode. (9) Set the program inhibit mode. (10) Set the verify mode. If the data have been written to the program memory, proceed to (11). If not, repeat steps (8) through (10). (11) Additional writing of (number of times of writing in (8) through (10): X) × 1 ms. (12) Set the program inhibit mode. (13) Input a pulse to the CLK pin four times to update the program memory address (+1). (14) Repeat steps (8) through (13) up to the last address. (15) Set the 0 clear mode of the program memory address. (16) Change the voltages on the VDD and VPP pins to 5 V. (17) Turn off power. The following figure illustrates steps (2) through (13) above. Repeated X time Reset Oscillation stabilization wait time Write Verify Additional write Address increment Data input Hi-Z Hi-Z Hi-Z Data output Data input Hi-Z VPP VDD GND VDD+1 VDD GND CLK VPP D0-D7 MD0 MD1 MD2 MD3 VDD |
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