Figure 8-2. Random Read

SCL

SDA

Start Condition

by Master

Device Address Byte

First Word Address Byte

MSb

MSb

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

1

0

1

0

A

2

A

1

A

0

0

0

Dummy Write

Start Condition

by Master

Device Address Byte

Data Word (n)

Stop Condition

by Master

MSb

MSb

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

1

0

1

0

A

2

A

1

A

0

1

0

D7 D6

D5 D4 D3

D2 D1 D0

1

X

X

X

X A11 A10 A9 A8

0

ACK

from Slave

ACK

from Slave

ACK

from Slave

NACK

from Master

Second Word Address Byte

MSb

A7 A6 A5 A4

A3 A2

A1 A0

0

ACK

from Slave

8.3

Sequential Read

Sequential reads are initiated by either a current address read or a random read. After the bus master receives a

data word, it responds with an Acknowledge. As long as the EEPROM receives an ACK, it will continue to increment

the word address and serially clock out sequential data words. When the maximum memory address is reached, the

data word address will rollover and the sequential read will continue from the beginning of the memory array. All

types of read operations will be terminated if the bus master does not respond with an ACK (it NACKs) during the

ninth clock cycle. After the NACK response, the master may send a Stop condition to complete the protocol, or it can

send a Start condition to begin the next sequence.

Figure 8-3. Sequential Read

SCL

SDA

Start Condition

by Master

ACK

from Slave

ACK

from Master

Device Address Byte

Data Word (n)

MSb

MSb

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

1

0

1

0

A

2

A

1

A

0

1

0

D7 D6

D5 D4

D3 D2 D1 D0

0

ACK

from Master

NACK

from Master

Stop Condition

by Master

ACK

from Master

Data Word (n+1)

Data Word (n+2)

Data Word (n+x)

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

1

2

3

4

5

6

7

8

9

D7 D6

D5

D4 D3 D2

D1 D0

0

D7

D6 D5

D4 D3

D2 D1

D0

0

D7 D6 D5

D4 D3

D2 D1

D0

1

MSb

MSb

MSb

8.4

Serial Number Read

Reading the serial number is similar to the sequential read sequence but requires use of the specific Device Address

and Word Address bytes as specified in Table 6-1 and Table 6-2.

Note:  The entire 128-bit value must be read from the starting address of the serial number block to ensure a unique

number.

AT24CS32

Read Operations

© 2020 Microchip Technology Inc.

Datasheet

DS20006341A-page 22