UPD75P3018A datasheet(40/66 Pages) RENESAS

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µPD75P3018A

Data Sheet U11917EJ2V1DS

VDD = 3.0 V

±10%

3.5

µA

VDD = 3.0 V, TA = 25

°C

3.5

µA

VDD = 3.0 V

±10%

117

µA

VDD = 3.0 V, TA = 25

°C39

µA

DC Characteristics (TA = –40 to +85

°C, VDD = 1.8 to 5.5 V)

Parameter

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

LCD drive voltage VLCD

VAC0 = 0

TA = –40 to +85

°C

2.7

VDD

TA = –10 to +85

°C

2.2

VDD

VAC0 = 1

1.8

VDD

VAC currentNote 1

IVAC

VAC0 = 1, VDD = 2.0 V

±10%

µA

LCD output voltage VODC

IO =

±1.0

µAVLCD0 = VLCD

±0.2

deviationNote 2

VLCD1 = VLCD

× 2/3

(common)

VLCD2 = VLCD

× 1/3

LCD output voltage VODS

IO =

±0.5

µA 1.8 V ≤ VLCD ≤ VDD

±0.2

deviationNote 2

(segment)

Supply currentNote 3 IDD1

6.0 MHzNote 4 VDD = 5.0 V

±10%Note 5

3.7

11.0

crystal

VDD = 3.0 V

±10%Note 6

0.73

2.2

IDD2

oscillation

HALT

VDD = 5.0 V

±10%

0.92

2.6

C1 = C2 = 22 pF mode

VDD = 3.0 V

±10%

0.3

0.9

IDD1

4.19 MHzNote 4 VDD = 5.0 V

±10%Note 5

2.7

8.0

crystal

VDD = 3.0 V

±10%Note 6

0.57

1.7

IDD2

oscillation

HALT

VDD = 5.0 V

±10%

0.90

2.5

C1 = C2 = 22 pF mode

VDD = 3.0 V

±10%

0.28

0.8

IDD3

32.768

Low-

VDD = 3.0 V

±10%

126

µA

kHzNote 7

voltage VDD = 2.0 V

±10%

110

µA

crystal

modeNote 8 VDD = 3.0 V, TA = 25

°C42

µA

oscillation

IDD4

HALT

Low-

VDD = 3.0 V

±10%

8.5

µA

mode

voltage VDD = 2.0 V

±10%

5.8

µA

modeNote 8 VDD = 3.0 V, TA = 25

°C

8.5

µA

IDD5

XT1 = 0 VNote 10 VDD = 5.0 V

±10%

0.05

µA

STOP mode VDD = 3.0 V

±10%

0.02

µA

TA = 25

°C

0.02

µA

Notes 1. Clear VAC0 to 0 in the low current consumption mode and STOP mode. When VAC0 is set to 1, the current

increases by about 1

µA.

2. Voltage deviation is the difference between the ideal values (VLCDn ; n = 0, 1, 2) of the segment and common

outputs and the output voltage.

3. The current flowing through the internal pull-up resistor is not included.

4. Including the case when the subsystem clock oscillates.

5. When the device operates in high-speed mode with the processor clock control register (PCC) set to 0011.

6. When the device operates in low-speed mode with PCC set to 0000.

7. When the device operates on the subsystem clock, with the system clock control register (SCC) set to 1001

and oscillation of the main system clock stopped.

8. When the sub-oscillation circuit control register (SOS) is set to 0000.

9. When the SOS is set to 0010.

10. When the SOS is set to 00x1, and the feedback resistor of the sub-oscillator is cut (x: don’t care).

Low current

consump-

tion

modeNote 9

Low current

consump-

tion

modeNote 9

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