UPD75P3018A datasheet(9/66 Pages) RENESAS

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µPD75P3018A

Data Sheet U11917EJ2V1DS

3.1 Port Pins (2/2)

Pin Name

I/O

Alternate Function

Function

8-bit

After Reset I/O Circuit

I/O

TypeNote 1

P60

I/O

KR0

This is a programmable 4-bit I/O port (PORT6).

√

Input

<F>-A

Input and output in single-bit units can be specified.

P61

KR1

When set for 4-bit units, an internal pull-up resistor

connection can be specified by software.

P62

KR2

P63

KR3

P70

I/O

KR4

This is a 4-bit I/O port (PORT7).

Input

<F>-A

When set for 4-bit units, an internal pull-up resistor

P71

KR5

connection can be specified by software.

P72

KR6

P73

KR7

BP0

Output

S24

1-bit output port (BIT PORT). These pins are also

—

Note 2

H-A

used as segment output pin.

BP1

S25

BP2

S26

BP3

S27

BP4

Output

S28

BP5

S29

BP6

S30

BP7

S31

Notes 1. Circuit types enclosed in brackets indicate Schmitt trigger input.

2. VLC1 is selected as the input source for BP0 to BP7. The output level varies depending on the external circuit

for BP0 to BP7 and VLC1.

Example: As shown below, BP0 to BP7 are mutually connected via the

µPD75P3018A, so the output levels of BP0 to BP7

are determined by the sizes of R1, R2, and R3.

VLC1

BP0

BP1

VDD

µ PD75P3018A

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