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UPD75P3036 데이터시트(PDF) 14 Page - Renesas Technology Corp |
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UPD75P3036 데이터시트(HTML) 14 Page - Renesas Technology Corp |
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14 / 67 page ![]() 12 Data Sheet U11575EJ1V1DS µPD75P3036 3.3 Pin Input/Output Circuits The input/output circuits for the µPD75P3036’s pins are shown in schematic form below. IN VDD P-ch N-ch VDD P-ch N-ch OUT data output disable IN VDD P-ch IN/OUT P.U.R. enable data P.U.R. Type D output disable P.U.R. : Pull-Up Resistor Type A VDD P-ch P.U.R. enable P.U.R. P.U.R. : Pull-Up Resistor IN P.U.R. : Pull-Up Resistor CMOS standard input buffer Push-pull output that can be set to output high-impedance (with both P-ch and N-ch OFF). Schmitt trigger input with hysteresis characteristics. TYPE A TYPE D TYPE E-B TYPE B TYPE B-C TYPE E-E VDD P-ch IN/OUT P.U.R. enable data P.U.R. Type D output disable Type A Type B (1/3) |
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