전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

DIX4192IPFBT 데이터시트(PDF) 4 Page - Burr-Brown (TI)

[Old version datasheet] Texas Instruments acquired Burr-Brown Corporation.
부품명 DIX4192IPFBT
상세설명  Integrated Digital Audio Interface Receiver and Transmitter
PDF  60 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  BURR-BROWN [Burr-Brown (TI)]
홈페이지  http://www.burr-brown.com
Logo BURR-BROWN - Burr-Brown (TI)

DIX4192IPFBT 데이터시트(HTML) 4 Page - Burr-Brown (TI)

  DIX4192IPFBT Datasheet HTML 1Page - Burr-Brown (TI) DIX4192IPFBT Datasheet HTML 2Page - Burr-Brown (TI) DIX4192IPFBT Datasheet HTML 3Page - Burr-Brown (TI) DIX4192IPFBT Datasheet HTML 4Page - Burr-Brown (TI) DIX4192IPFBT Datasheet HTML 5Page - Burr-Brown (TI) DIX4192IPFBT Datasheet HTML 6Page - Burr-Brown (TI) DIX4192IPFBT Datasheet HTML 7Page - Burr-Brown (TI) DIX4192IPFBT Datasheet HTML 8Page - Burr-Brown (TI) DIX4192IPFBT Datasheet HTML 9Page - Burr-Brown (TI) Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 60 page
background image
www.ti.com
ELECTRICAL CHARACTERISTICS: Audio Serial Ports
ELECTRICAL CHARACTERISTICS: SPI Interface
DIX4192
SBFS031C – JANUARY 2006 – REVISED JUNE 2006
All specifications are at TA = +25°C, VDD18 = +1.8V, VDD33 = +3.3V, VIO = +3.3V, and VCC = +3.3V, unless otherwise noted.
DIX4192
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
AUDIO SERIAL PORTS (Port A and Port B)
LRCK clock frequency, fLRCK
0
216
kHz
LRCK clock duty cycle, tLRCKD
50
%
BCK clock frequency, fBCK
0
13.824
MHz
BCK high pulse width, tBCKH
10
ns
BCK low pulse width, tBCKL
10
ns
Audio data Input (SDIN) setup time, tAIS
10
ns
Audio data input (SDIN) hold time, tAISH
10
ns
Audio data output (SDOUT) delay, tADD
10
ns
All specifications are at TA = +25°C, VDD18 = +1.8V, VDD33 = +3.3V, VIO = +3.3V, and VCC = +3.3V, unless otherwise noted.
DIX4192
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
HOST INTERFACE: SPI Mode
Serial clock (CCLK) frequency, fCCLK
0
40
MHz
CS falling to CCLK rising, tCSCR
8
ns
CCLK falling to CS rising, tCFCS
7
ns
CDIN data setup time, tCDS
7
ns
CDIN data hold time, tCDH
6
ns
CCLK falling to CDOUT data valid, tCFDO
3
ns
CS rising to CDOUT high-impedance, tCSZ
3
ns
4
Submit Documentation Feedback



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com