Data Sheet S14288EJ1V0DS

3

µµµµPD16876

PIN CONFIGURATION (Top View)

1

LATCH

OUT

8

2

CTL

OUT

7

3

FLG

IN

6

4

GND

IN

5

8-pin SOP

PIN DESCRIPTION

Pin No.

Pin Name

Pin Function

1

LATCH

Select LATCH function. “H” is effective LATCH function.

2

CTL

Control input: Active-low, TTL input

3

FLG

Detection flag (output): Active-low, Nch open-drain

4

GND

Ground

5/6

IN

Power input: Source of MOSFET for output. Power supply to internal circuitry of IC

7/8

OUT

Switch output: Drain of MOSFET for output. Usually, connected to load.

TRUTH TABLE (H: High level, L: Low level, ON: Output on, OFF: Output off, X: H or L)

CTL (In)

FLG (Out)

OUT (Out)

Operation mode

L

H

ON

Normal operation

H

H

OFF

Switch OFF/Stand by mode

L

L

ON

Overcurrent detection

X

L

OFF

Thermal shutdown circuit operation

X

L

OFF

Undervoltage lockout circuit operation

LATCH

Operation mode

H (LATCH mode)

After overcurrent detection circuit operates, output is latched.

L (non LATCH mode)

After overcurrent detection circuit operates, output is operated limited current function.