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UPD70741 데이터시트(PDF) 39 Page - Renesas Technology Corp |
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UPD70741 데이터시트(HTML) 39 Page - Renesas Technology Corp |
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39 / 114 page ![]() µPD70741 37 8. SERIAL INTERFACE FUNCTION 8.1 Features The V821 provides two transmission and reception channels as part of its serial interface function. The two interface modes listed below are supported, one channel being provided for each mode. The two modes operate independently of each other. (1) Asynchronous serial interface (UART) (2) Synchronous serial interface (CSI) In UART mode, one-byte serial data is transmitted or received after a start bit, and full-duplex communication is enabled. In CSI mode, data is transferred using three signal lines (three-wire serial I/O): the serial clock (SCLK), serial input (SI), and serial output (SO). 8.2 Asynchronous Serial Interface (UART) 8.2.1 Features Transfer rate 110 bps to 38 400 bps (when BRG is used with φ = 25 MHz) 781 Kbps maximum (when φ/2 is used with φ = 25 MHz) Full-duplex communication Two-pin configuration TXD : Transmission data output pin RXD : Reception data input pin Reception error detection function • Parity error • Framing error • Overrun error Interrupt source (3 types) • Reception error interrupt (INTSER) • Reception completion interrupt (INTSR) • Transmission completion interrupt (INTST) The character length for transmission and reception data is specified upon ASIM reception. Character length : 7 or 8 bits 9 bits (when an extended bit is used) Parity function: Odd parity, even parity, zero parity, without parity Transmission stop bit: 1 or 2 bits On-chip baud rate generator |
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