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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AS4CM4EOQ 데이터시트(PDF) 3 Page - Alliance Semiconductor Corporation |
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AS4CM4EOQ 데이터시트(HTML) 3 Page - Alliance Semiconductor Corporation |
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3 / 16 page  ® AS4C4M4EOQ AS4C4M4E1Q 3/22/01; v.1.0 Alliance Semiconductor P. 3 of 16 Logic block diagram for 4K refresh Logic block diagram for 2K refresh Recommended operating conditions †V IL min -3.0V for pulse widths less than 5 ns. Recommended operating conditions apply throughout this document unlesss otherwise specified. Parameter Symbol Min Nominal Max Unit Supply voltage 4C4M4EOQ AS4C4M4E1Q VCC 4.5 5.0 5.5 V GND 0.0 0.0 0.0 V Input voltage 4C4M4EOQ AS4C4M4E1Q VIH 2.4 – VCC V VIL –0.5† –0.8 V Ambient operating temperature TA 070 °C RAS clock generator 4,194,304 × 4 Array (16,777,216) Sense amp A0 A1 A2 A3 A4 A5 A6 A7 VCC GND A8 Column decoder Data I/O buffers OE RAS CAS WE clock generator WE I/O0 to I/O3 CAS clock generator A9 A10 A11 RAS clock generator 4,194,304 × 4 Array (16,777,216) Sense amp A0 A1 A2 A3 A4 A5 A6 A7 VCC GND A8 Column decoder Substrate bias generator Data I/O buffers OE RAS CAS WE clock generator WE I/O0 to I/O3 CAS clock generator A9 A10 |
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