DA1017.002

29 May, 2002

2(6)

PAD LAYOUT

DIE size = 2.09 x 1.59 mm; PAD size = 100 x 100

µm

Substrate is connected to VDD. Please make sure that VDD is bonded first.

Note: Coordinates are calculated using VDD as a centre point.

Pad Identification

Name

X-coordinate

Y-coordinate

Note

Power Supply Voltage

VDD

0

µm

0

µm

Demodulator Capacitor

DEC

244

µm

8

µm

AGC Capacitor

AGC

520

µm

8

µm

Power Up Input

PUP

759

µm

8

µm

1

DCF Signal Output

DCF

1075

µm

8

µm

2

Quarz Filter Input

QI

1038

µm

1625

µm

Quarz Filter Output

QO

760

µm

1625

µm

Power Down Input

PDN

483

µm

1625

µm

3

Receiver Input

RFI

243

µm

1625

µm

Power Supply Ground

VSS

-15

µm

1605

µm

Notes:

1) See power down control table below.

-

Internal pull-down resistor > 1 M

Ω to VSS

2) DCF = VSS when carrier amplitude at maximum; DCF = VDD when carrier amplitude is reduced (25%

modulated)

-

-

at power down the output is high impedance

3) See power down control logic table below.

- Internal pull-up resistor > 1M

Ω to VDD

PDN

PUP

Power Down

VSS

VSS

NO

VSS

VDD

NO

VDD

VSS

YES (In power down if both PDN and PUP are left unconnected)

VDD

VDD

NO

VDD DEC

QI

AGC

DCF

VSS RFI PDN QO

1588 µm

2094 µm

MAS1017

PUP