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UPD780921 데이터시트(PDF) 21 Page - Renesas Technology Corp |
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UPD780921 데이터시트(HTML) 21 Page - Renesas Technology Corp |
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21 / 40 page ![]() 21 µPD780921, 780922, 780923, 780924 5.6 SERIAL INTERFACE Two independent serial interface channels (UART00 and UART01) are incorporated. Each serial interface incorporates a baud-rate generator. Therefore, it is possible to set a serial transfer rate that is independent of the operating clock frequency. The serial transfer rate can be set from 75 to 76800 bps (@ fx = 8.38-MHz operation) by setting the mode register. Table 5-7. Serial Interface Block Diagram Remark n = 0, 1 Internal Bus Receive Buffer RXBn RxD0n TxD0n Receive Shift Register Transmit Shift Register PE0n FE0n OVE0n ASIS0n TXSn Receive Control Parity Check Transmit Control Parity Add INTSERn INTSTn Baud Rate Generator fX/2 to fX/28 (when UART00) TXE0n RXE0n PS0n1 PS0n0 CL0n SL0n ISRM0n IRDAM0n ASIM0n INTSRn fX/24 to fX/211 (when UART01) |
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