 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
ES9033Q 데이터시트(PDF) 78 Page - ESS Technology,Inc |
|
|
|||||||||||||||||||||||||||||
ES9033Q 데이터시트(HTML) 78 Page - ESS Technology,Inc |
|
|
78 / 103 page  a 0.3.1 ES9033 Datasheet Information ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM 78 Register 77-76: DRE GAIN CH2 Bits [15:0] Default 16’h1A34 Bits Mnemonic Description [15:0] DRE_GAIN2 Sets the DRE gain for CH2. Shift right 1 bit corresponds to - 6dB. • 16’h07FF (0dB): Minimum • 16’h1A34 (16.33dB): Default • 16’h7FFF (30dB): Maximum Register 79-78: DRE ON THRESHOLD Bits [15:0] Default 16’h0CF1 Bits Mnemonic Description [15:0] DRE_ON_THRESH DRE on threshold. Shift right 1 bit corresponds to -6dB. • 16’h0CF1 (-48dB): Default • 16’hFFFF (-24dB): Maximum Register 81-80: DRE OFF THRESHOLD Bits [15:0] Default 16’h8184 Bits Mnemonic Description [15:0] DRE_OFF_THRESH DRE off threshold. Shift right 1 bit corresponds to -6dB. • 16’h8184 (-28dB): Default • 16’hFFFF (-24dB): Maximum |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
