STMPE811QTR datasheet(13/66 Pages) STMICROELECTRONICS

13 / 66 page

STMPE811

I2C interface

Doc ID 14489 Rev 5

13/66

4.2

Data input

The device samples the data input on SDATA on the rising edge of the SCLK. The SDATA

signal must be stable during the rising edge of SCLK and the SDATA signal must change

only when SCLK is driven low.

Figure 6.

Read and write modes (random and sequential)

Table 8.

Operating modes

Mode

Byte

Programming sequence

Read

≥1

Start, Device address, R/W = 0, Register address to be read

Restart, Device address, R/W = 1, Data Read, Stop

If no Stop is issued, the Data Read can be continuously performed. If

the register address falls within the range that allows an address auto-

increment, then the register address auto-increments internally after

every byte of data being read.

Write

≥1

Start, Device address, R/W = 0, Register address to be written, Data

Write, Stop

If no Stop is issued, the Data Write can be continuously performed. If

the register address falls within the range that allows address auto-

increment, then the register address auto-increments internally after

every byte of data being written in. For those register addresses that

fall within a non-incremental address range, the address is kept static

throughout the entire write operation. Refer to the memory map table

for the address ranges that are auto and non-increment.

Device

Address

Reg

Address

Device

Address

Data

Read

One byte

Read

Device

Address

Reg

Address

Device

Address

Data

Read

More than one byte

Read

Data

Read + 1

Data

Read + 2

Device

Address

Reg

Address

Data

to be

written

One byte

Write

More than one byte

Read

Device

Address

Reg

Address

Data to

Write

Data to

Write + 2

Data to

Write + 1

Master

Slave

AM00775V1

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