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WM8985GEFL/R 데이터시트(PDF) 55 Page - Wolfson Microelectronics plc

부품명 WM8985GEFL/R
상세설명  Multimedia CODEC With Class D Headphone and Line Out
PDF  118 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8985GEFL/R 데이터시트(HTML) 55 Page - Wolfson Microelectronics plc

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Pre-Production
WM8985
w
PP, Rev 3.5, January 2007
55
Figure 23 DAC Digital Filter Path
The analogue outputs from the DACs can then be mixed with the aux analogue inputs and the ADC
analogue inputs. The mix is fed to the output drivers for headphone (LOUT1/ROUT1,
LOUT2/ROUT2) or line (OUT3/OUT4). OUT3 and OUT4 have additional mixers which allow them to
output different signals to the line outputs or back into the record path.
DIGITAL PLAYBACK (DAC) PATH
Digital data is passed to the WM8985 via the flexible audio interface and is then passed through a
variety of advanced digital filters as shown in Figure 23 to the hi-fi DACs. The DACs are enabled by
the DACENL/R register bits.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0
DACENL
0
Left channel DAC enable
0 = DAC disabled
1 = DAC enabled
R3 (03h)
Power
Management 3
1
DACENR
0
Right channel DAC enable
0 = DAC disabled
1 = DAC enabled
Table 21 DAC Enable Control
The WM8985 also has a Soft Mute function, which when enabled, gradually attenuates the volume
of the digital signal to zero. When disabled, the gain will ramp back up to the digital gain setting. This
function is enabled by default. To play back an audio signal, it must first be disabled by setting the
SOFTMUTE bit to zero.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
0
DACPOL
0
Left DAC output polarity:
0 = non-inverted
1 = inverted (180 degrees phase shift)
1
DACRPOL
0
Right DAC output polarity:
0 = non-inverted
1 = inverted (180 degrees phase shift)
2
AMUTE
0
Automute enable
0 = Amute disabled
1 = Amute enabled
3
DACOSR128
0
DAC oversampling rate:
0 = 64x (lowest power)
1 = 128x (best performance)
R10 (0Ah)
DAC Control
6
SOFTMUTE
0
Softmute enable:
0 = Enabled
1 = Disabled
Table 22 DAC Control Register



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