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LP87702 데이터시트(PDF) 35 Page - Texas Instruments

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부품명 LP87702
상세설명  LP87702-Q1 Dual Buck Converter and 5-V Boost With Diagnostic Functions
PDF  99 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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LP87702 데이터시트(HTML) 35 Page - Texas Instruments

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The source for the fault can be read from PGx_FAULT register when PGx signal becomes inactive. If the invalid
output voltage becomes valid again the PGx signal becomes active. Thus the PGx signal shows all the time if
the monitored output voltages are valid. Figure 8-11 shows an example of the PGx pin operation in continuous
mode.
The PGx signal can also be configured so that it maintains the inactive state even when the monitored outputs
are valid, but there are PG_FAULT_x bits pending clearance. This type of operation is selected by setting the
PGOOD_FAULT_GATES_PGx bit to 1.
V(VANA)
VANA_UVLO
State
Shut
down
Read
OTP
Standby
PGx pin
EN
VOUT (Buck1)
VOUT (Boost)
Powergood (Buck1)
Powergood (Boost)
Active
EN (Buck1)
EN (Boost)
4ms
2ms
Figure 8-11. PGx Pin Operation in Continuous Mode
8.3.10.3.3 Summary of PG0, PG1 Gated, and Continuous Operating Modes
Table 8-6 summarizes the PGx behavior in different application scenarios, for the gated and continuous
operating modes.
www.ti.com
LP87702-Q1
SNVSAL1C – DECEMBER 2017 – REVISED JUNE 2021
Copyright © 2021 Texas Instruments Incorporated
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