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AT43USB353M 데이터시트(PDF) 44 Page - ATMEL Corporation

부품명 AT43USB353M
상세설명  Low Cost Full-speed USB Microcontroller with Embedded Hub, ADC and PWM
PDF  95 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT43USB353M 데이터시트(HTML) 44 Page - ATMEL Corporation

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AT43USB353M
3307B–USB–4/04
Note:
X = A or B
Note that in the PWM mode, the 10 least significant OCR1A/OCR1B bits, when written, are
transferred to a temporary location. They are latched when Timer/Counter1 reaches the value
TOP. This prevents the occurrence of odd-length PWM pulses (glitches) in the event of an
unsynchronized OCR1A/OCR1B write. See Figure 13 for an example.
Figure 13. Effects on Unsynchronized OCR1 Latching
Note:
X = A or B
During the time between the write and the latch operation, a read from OCR1A or OCR1B will
read the contents of the temporary location. This means that the most recently written value
always will read out of OCR1A/B
When the OCR1 contains $0000 or TOP, the output OC1A/OC1B is updated to low or high on
t he nex t c o m pare m a t c h, ac c o rdi ng t o t he s e t t i ngs of COM 1 A 1 / C OM 1A 0 or
COM1B1/COM1B0. This is shown in Table 19.
Note: If the compare register contains the TOP value and the prescaler is not in use
(CS12..CS10 = 001), the PWM output will not produce any pulse at all, because up-counting
and down-counting values are reached simultaneously. When the prescaler is in use
(CS12..CS10 = 001 or 000), the PWM output goes active when the counter reaches the TOP
Table 18. Compare1 Mode Select in PWM Mode
COM1X1
COM1X0
Effect on OCX1
0
0
Not connected
0
1
Not connected
10
Cleared on compare match, up-counting. Set on compare match,
down-counting (non-inverted PWM).
11
Cleared on compare match, down-counting. Set on compare match,
up-counting (inverted PWM).
Synchronized
OCR1X Latch
PWM Output OC1X
Counter Value
Compare Value
PWM Output OC1X
Counter Value
Compare Value
Unsynchronized
OCR1X Latch
Glitch
Compare Value Changes
Compare Value Changes



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