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AT26DF321 데이터시트(PDF) 11 Page - ATMEL Corporation |
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AT26DF321 데이터시트(HTML) 11 Page - ATMEL Corporation |
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11 / 34 page ![]() 11 3633C–DFLASH–08/06 AT26DF321 [Preliminary] Figure 8-4. Chip Erase 9. Protection Commands and Features 9.1 Write Enable The Write Enable command is used to set the Write Enable Latch (WEL) bit in the Status Regis- ter to a logical “1” state. The WEL bit must be set before a program, erase, Protect Sector, Unprotect Sector, or Write Status Register command can be executed. This makes the issuance of these commands a two step process, thereby reducing the chances of a command being accidentally or erroneously executed. If the WEL bit in the Status Register is not set prior to the issuance of one of these commands, then the command will not be executed. To issue the Write Enable command, the CS pin must first be asserted and the opcode of 06h must be clocked into the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode will be ignored. When the CS pin is deasserted, the WEL bit in the Status Register will be set to a logical “1”. The complete opcode must be clocked into the device before the CS pin is deasserted; otherwise, the device will abort the operation and the state of the WEL bit will not change. Figure 9-1. Write Enable SCK CS SI SO MSB 23 1 0 CCCCCCCC 67 5 4 OPCODE HIGH-IMPEDANCE SCK CS SI SO MSB 23 1 0 00000110 67 5 4 OPCODE HIGH-IMPEDANCE |
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