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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AT83SND1CXXX-ROTIL 데이터시트(PDF) 201 Page - ATMEL Corporation |
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AT83SND1CXXX-ROTIL 데이터시트(HTML) 201 Page - ATMEL Corporation |
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201 / 212 page  201 4109J–8051–10/06 AT8xC51SND1C 22.4.6 External Clock Drive and Logic Level References 22.4.6.1 Definition of symbols Table 169. External Clock Timing Symbol Definitions 22.4.6.2 Timings External Clock AC Timings V DD = 2.7 to 3.3 V, TA = -40 to +85°C 22.4.6.3 Waveforms Figure 22-24. External Clock Waveform Figure 22-25. AC Testing Input/Output Waveforms Note: 1. During AC testing, all inputs are driven at V DD -0.5 V for a logic 1 and 0.45 V for a logic 0. 2. Timing measurements are made on all outputs at V IH min for a logic 1 and VIL max for a logic 0. Figure 22-26. Float Waveforms Signals Conditions C Clock H High L Low X No Longer Valid Symbol Parameter Min Max Unit T CLCL Clock Period 50 ns T CHCX High Time 10 ns T CLCX Low Time 10 ns T CLCH Rise Time 3 ns T CHCL Fall Time 3 ns T CR Cyclic Ratio in X2 mode 40 60 % 0.45 V T CLCL VDD - 0.5 V IH1 V IL T CHCX T CLCH T CHCL T CLCX 0.45 V VDD - 0.5 0.7 V DD 0.3 VDD V IH min VIL max INPUTS OUTPUTS V LOAD V OH - 0.1 V V OL + 0.1 V V LOAD + 0.1 V V LOAD - 0.1 V Timing Reference Points |
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